Quantum pushdown automata with garbage tape, International Journal of Foundations of Computer Science, 29(3) 425-446, 2018.04

Masaki Nakanishi

Single Author

Exact affine counter automata, Proc. of the 15th International Conference on Automata and Formal Languages, EPTCS 252 205-218, 2017.08

Masaki Nakanishi, Kamil Khadiev, Krisjanis Prusis, Jevgenijs Vihrovs, Abuzer Yakaryilmaz

Multiple Authorship (Including Foreigners)

Quantum Query Complexity of Almost All Functions with Fixed On-set Size, computational complexity, 25(4) 723-735, 2016.12

A. Ambainis, K. Iwama, M. Nakanishi, H. Nishimura, R. Raymond, S. Tani, S. Yamashita

Multiple Authorship (Including Foreigners)

Cache-aware quantum circuit simulation on a GPGPU, Proc. of the 16th Asian Quantum Information Science Conference (AQIS2016), 11-12, 2016.08

M. Nakanishi, N. Morioka, and K. Shoji

Multiple Authorship (Including Foreigners)

A Fast Quantum Computer Simulator based on Register Reordering, IEICE Trans. Inf. & Syst., E99-D(2) 332-340, 2016.02

M. Nakanishi, M. Matsuyama, Y. Yokoo

Multiple Authorship (Including Foreigners)

Classical and Quantum Counter Automata on Promise Problems, Proc. of the 20th International Conference on Implementation and Application of Automata (CIAA 2015), LNCS 9223 224-237, 2015.08

M. Nakanishi, A. Yakaryilmaz

Multiple Authorship (Including Foreigners)

Quantum Pushdown Automata with a Garbage Tape, Proc. of the 41st International Conference on Current Trends in Theory and Practice of Computer Science (SOFSEM 2015), LNCS 8939 352-363, 2015.01

Masaki Nakanishi

Single Author

A quantum algorithm processor architecture based on register reordering, Proc. of the 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2014), 1-6, 2014.10

Masaki Nakanishi, Miki Matsuyama, Yumi Yokoo

Multiple Authorship (Including Foreigners)

Quantum Pushdown Automata with a Garbage Space, 第29回量子情報技術研究会研究会資料, 28-33, 2013.11

M.Nakanishi

Single Author

Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication, IEICE Transactions on Information and Systems, E96.D(1) 1-8, 2013.01

M.Villagra, M.Nakanishi, S.Yamashita, Y.Nakashima

Multiple Authorship (Including Foreigners)

Tensor rank and strong quantum nondeterminism in multiparty communication, Proc. of the 9th Annual Conference on Theory and Applications of Models of Computation (TAMC2012), 400-411, 2012.05

M. Villagra, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Quantum walks on the line with phase parameters, IEICE Trans. Inf. & Syst., E95-D(3) 722-730, 2012.03

M. Villagra, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Symbolic discord computation for efficient analysis of message sequence charts, IPSJ Transactions on System LSI Design Methodology, 4 210-221, 2011.08

Y. Kakiuchi, T. Nakagawa, K. Hamaguchi, T. Tanimoto, and M. Nakanishi

Multiple Authorship (Including Foreigners)

Quantum query complexity of hamming distance estimation, Proc. of the 11th Asian Quantum Information Science Conference 2011(AQIS2011), 103-104, 2011.08

M. Villagra, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

An Efficient Conversion of Quantum Circuits to a Linear Nearest Neighbor Architecture, Quantum Information & Computation, 11(1&2) 142-166, 2011.01

Yuichi Hirata, Masaki Nakanishi, Shigeru Yamashita, and Yasuhiko Nakashima

Multiple Authorship (Including Foreigners)

Asymptotics of Quantum Walks on the Line with Phase Parameters, Proc. of Asian Conference on Quantum Information Science 2010 (AQIS2010), 163-164, 2010.08

Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, and Yasuhiko Nakashima

Multiple Authorship (Including Foreigners)

A SAT Solver Based on Quantum and Classical Random Walk, Proc. of Asian Conference on Quantum Information Science 2010 (AQIS2010), 165-166, 2010.08

Daisuke Yokomine, Masaki Nakanishi, Shigeru Yamashita, and Yasuhiko Nakashima

Multiple Authorship (Including Foreigners)

SAT-based Discord Computation for Message Sequence Charts, SIG Technical Reports (UBI), 2010-UBI-25(63) 1-8, 2010.03

Tomofumi Nakagawa, Kiyoharu Hamaguchi, Yosuke Kakiuchi, Masaki Nakanishi, Tadaaki Tanimoto

Multiple Authorship (Only Japanese)

On the Weakness of One-Way Quantum Pushdown Automata, Proc. of the Fourth International Conference on Quantum, Nano and Micro Technologies (ICQNM2010), 83-87, 2010.02

Masaki Nakanishi

Single Author

Quantum Communication Protocols with Public Coins（共著）, IPSJ SIG Technical Reports, 2009-AL-126(6) , 2009.09

S. Tani, M. Nakanishi, and S. Yamashita

Multiple Authorship (Including Foreigners)

An efficient middle-level framework for quantum circuit simulation on multiple simulator platforms（共著）, IEICE Technical Report, CPSY2009-14 25-30, 2009.08

A. Vikman, T. Nakada, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Synthesis of Quantum Circuits for d-Level Systems by using Cosine-Sine Decomposition (共著), Quantum Information & Computation, 9(5&6) 423-443, 2009.05

Y. Nakajima, Y. Kawano, H. Sekigawa, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Multi-Party Quantum Communication Complexity with Routed Messages（共著）, IEICE Trans. Inf. & Syst, E92-D(2) 191-199, 2009.02

S. Tani, M. Nakanishi, and S. Yamashita

Multiple Authorship (Including Foreigners)

An Efficient Method to Convert Arbitrary Quantum Circuits to Ones on a Linear Nearest Neighbor Architecture（共著）, Proc. of the Third International Conference on Quantum, Nano and Micro Technologies(ICQNM 2009), 26-33, 2009.02

Y. Hirata, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Quantum Secure Direct Communication Protocol without Using Quantum Memory（共著）, Proc. of 2009 Symposium on Cryptography and Information Security (SCIS2009), 2009.01

Y. Murakami and M. Nakanishi

Multiple Authorship (Including Foreigners)

A Method of Randomizing a Part of an FPGA Configuration Bitstream（共著）, Proc. of 2008 International Symposium on Information Theory and its Applications(ISITA2008), 1493-1496, 2008.12

M. Nakanishi and Y. Murakami

Multiple Authorship (Including Foreigners)

A Functional Unit with Small Variety of Highly Reliable Cells（共著）, Proc. of 14th Pacific Rim International Symposium on Dependable Computing (PRDC'08), 353-354, 2008.12

K. Suzuki, T. Nakada, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Quantum Query Complexity of Boolean Functions with Small On-Sets（共著）, Proc. of the 19th International Symposium on Algorithms and Computation (ISAAC 2008), 907-918, 2008.12

A. Ambainis, K. Iwama, M. Nakanishi, H. Nishimura, R. Raymond, S. Tani, and S. Yamashita

Multiple Authorship (Including Foreigners)

An Efficient Method to Convert Arbitrary Quantum Circuits to Ones on a Linear Nearest Neighbor Architecture（共著）, IEICE Technical Report, QIT2008-57 45-50, 2008.11

Y. Hirata, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Quantum Query Complexity of Boolean Functions with Small On-Sets（共著）, IEICE Technical Report, QIT2008-56 39-44, 2008.11

A. Ambainis, K. Iwama, M. Nakanishi, H. Nishimura, R. Raymond, S. Tani, and S. Yamashita

Multiple Authorship (Including Foreigners)

A Method for Secure FPGA Configuration（共著）, Proc. of Computer Security Symposium2008(CSS2008), 2008.10

M. Nakanishi and Y. Murakami

Multiple Authorship (Including Foreigners)

Multi-Party Quantum Communication Complexity with Routed Messages（共著）, Proc. of the 14th Annual International Computing and Combinatorics Conference(COCOON2008), 180-190, 2008.06

S. Tani, M. Nakanishi, S. Yamashita

Multiple Authorship (Including Foreigners)

An Almost Optimal Quantum String Sealing Protocol and Its Security Analysis（共著）, Proc. of the 1st AAAC Annual Meeting(AAAC2008), 20, 2008.04

M. Nakanishi, S. Tani, and S. Yamashita

Multiple Authorship (Including Foreigners)

An FPGA Configuration Scheme for Bitstream Protection, Proc. of International Workshop on Applied Reconfigurable Computing (ARC2008), 330-335, 2008.03

Masaki Nakanishi

Single Author

A Scheme for Protecting FPGA Configuration Bitstreams, Proc. of Symposium on Cryptography and Information Security (SCIS2008), 1B2-1, 2008.01

M. Nakanishi

Single Author

An Information-Theoretic Security Analysis of Quantum String Sealin, Proc. of the 6th WSEAS International Conference on Information Security and Privacy (ISP'07), 30-35, 2007.12

M. Nakanishi, S. Tani, and S. Yamashita

Multiple Authorship (Including Foreigners)

A Quantum Secure Direct Communication Protocol for Sending a Quantum State and Its Security Analysis, Proc. of the 6th WSEAS International Conference on Information Security and Privacy (ISP'07), 91-97, 2007.12

Y. Murakami, M. Nakanishi, S. Yamashita, Y. Nakashima, and M. Hagiwara

Multiple Authorship (Including Foreigners)

An Analysis of Quantum Communication Complexity Depending on Network Topologies, IEICE Technical Report, QIT2007-83 150-153, 2007.11

S. Tani, M. Nakanishi, and S. Yamashita

Multiple Authorship (Including Foreigners)

A Practical Framework to Utilize Quantum Search, Proc. of the 2007 IEEE Congress on Evolutionary Computation (CEC2007), 2007.09

Shigeru Yamashita, and Masaki Nakanishi

Multiple Authorship (Including Foreigners)

A Hardware SAT Solver Using Non-Chronological Backtracking and Clause Recording without Overheads, Proc. of 3rd International Workshop on Applied Reconfigurable Computing (ARC2007), 343-349, 2007.03

S. Hiramoto, M. Nakanishi, S. Yamashita, and Y. Nakashima

Multiple Authorship (Including Foreigners)

Robust Quantum Algorithms Computing OR with ε-biased Oracles, IEICE Trans. Inf. & Syst., E90-D(2) 395-402, 2007.02

T. Suzuki, S. Yamashita, M. Nakanishi, and K. Watanabe

Multiple Authorship (Including Foreigners)

An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs,, IEICE Trans. Fundamentals, E89-A(12) 3416-3426, 2006.12

M. Tomono, M. Nakanishi, S. Yamashita, K. Nakajima, and K. Watanabe

Multiple Authorship (Including Foreigners)

Bit-Length Optimization Method for High-Level Synthesis Based on Non-Linear Programming Technique, IEICE Trans. Fundamentals, E89-A(12) 3427-3434, 2006.12

N. Doi, T. Horiyama, M. Nakanishi, and S. Kimura

Multiple Authorship (Including Foreigners)

Secure Processor Architecture for High-Speed Verification of Memory Integrity, IPSJ SIG Technical Reports, 2006-ARC-170 13-18, 2006.11

A. Okazaki, M. Nakanishi, and S. Yamashita

Multiple Authorship (Including Foreigners)

Quantum Secure Direct Communication Protocols for Sending a Quantum State, Proc. of the 2006 International Symposium on Information Theory and its Applications (ISITA 2006), 2006.10

Y. Murakami, M. Nakanishi, M. Hagiwara, S. Yamashita and Y. Nakashima

Multiple Authorship (Including Foreigners)

An Efficient Approximation of SU(d) Using Decomposition, Proc. of Asian Conference on Quantum Information Science 2006 (AQIS 2006), 147-148, 2006.09

H. Nishiyama, M. Nakanishi, S. Yamashita and Y. Nakashima

Multiple Authorship (Including Foreigners)

Robust Quantum Algorithms with ε-Biased Oracles, Proc. of 12th Annual International Computing and Combinatorics Conference (COCOON 2006), 116-125, 2006.08

T. Suzuki, S. Yamashita, M. Nakanishi, and K. Watanabe

Multiple Authorship (Including Foreigners)

Quantum Secure Direct Communication Protocols for Transmitting Quantum States, IEICE Technical Report, QIT2006-28 233-234, 2006.05

Y. Murakami, M. Nakanishi, M. Hagiwara, S. Yamashita and Y. Nakashima

Multiple Authorship (Including Foreigners)

Upper Bounds for Quantum Biased Oracles with Explicit Bias Rate, 数解研講究録, 1489 135-141, 2006.05

T. Suzuki, S. Yamashita, M. Nakanishi, and K. Watanabe

Multiple Authorship (Including Foreigners)

Online FPGA Placement Using I/O Routing Information, IEICE Technical Report, VLD2006-1 1-6, 2006.05

M. Tomono, M. Nakanishi, S. Yamashita, K. Nakajima, and K. Watanabe

Multiple Authorship (Including Foreigners)

Online Task Placement for Partially Reconfigurable FPGAs Using I/O Routing Information, Proc. of Conference of Synthesis And System Integration of Mixed Information technologies (SASIMI 2006), 342-349, 2006.04

M. Tomono, M. Nakanishi, S. Yamashita, K. Nakajima, and K. Watanabe

Multiple Authorship (Including Foreigners)

A New Approach to Online FPGA Placement, Proc. of Conference of Information Science and Systems, 2006.03

M. Tomono, M. Nakanishi, S. Yamashita, K. Nakajima, and K. Watanabe

Multiple Authorship (Including Foreigners)

Expressive Power of Quantum Pushdown Automata with Classical Stack Operations under the Perfect-Soundness Conditions, IEICE Trans. Inf. & Syst., E89-D(3) 1120-1127, 2006.03

M. Nakanishi, K. Hamaguchi, and T. Kashiwabara

Multiple Authorship (Including Foreigners)

No Preshared-Key Quantum Secret Communication Protocol, Proc. of the 2006 IEICE General Conference, DS-1-12 , 2006.03

Y. Murakami, M. Nakanishi, M. Hagiwara, S. Yamashita and Y. Nakashima

Multiple Authorship (Including Foreigners)

Quantum Communication Complexity for the Distinctness Function on a Ring, Proc. of Workshop on Theory of Quantum Computation, Communication, and Cryptography (TQC2006), 10-11, 2006.02

S. Tani, M. Nakanishi, and S. Yamashita

Multiple Authorship (Including Foreigners)

Quantum Sealing Schemes against Collective Measurement Attacks, IEICE Technical Report, QIT2005-90 229-232, 2005.11

T. Katsumata, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Automata with Quantum and Classical Resources, IPSJ Journal, 46(10) 2384-2391, 2005.10

Masaki Nakanishi

Single Author

Quantum versus Classical Pushdown Automata in Exact Computation, IPSJ Journal, 46(10) 2471-2480, 2005.10

Y. Murakami, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Cheater Identifiable Quantum Secret Sharing Schemes, IEICE Technical Report, ISEC2005-55 89-92, 2005.07

Y. Murakami, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Reconfigurable 1-Bit Processor Array with Reduced Wiring Area, Proc. of International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA2005), 225-331, 2005.06

N. Nakai, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Event-Oriented Computing with Reconfigurable Platform, Proc. of the 10th Asia and South Pacific Design Automation Conference (ASP-DAC2005), 1248-1251, 2005.01

M. Tomono, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Toward a Practical Environment for Quantum Programming, Proc. of Asia-Pacific Conference on Quantum Information Science 2004, 2004.12

S. Yamashita, M. Nakanishi, and K. Watanabe

Multiple Authorship (Including Foreigners)

A Quantum Protocol for the List-Nonequality Function, IEICE Technical Report, QIT2004-51 21-25, 2004.12

S. Tani, M. Nakanishi, and S. Yamashita

Multiple Authorship (Including Foreigners)

An Optimization Method in Floating-point to Fixed-point Conversion using Positive and Negative Error Analysis and Sharing of Operations, Proc. of the 12th Workshop on Synthesis And System Integration of Mixed Information technologies(SASIMI 2004), 466-471, 2004.10

N. Doi, T. Horiyama, M. Nakanishi, and S. Kimura

Multiple Authorship (Including Foreigners)

On the Power of One-Sided Error Quantum Pushdown Automata with Classical Stack Operations, Proc. of 10th Annual International Computing and Combinatorics Conference (COCOON 2004), 179-187, 2004.08

M. Nakanishi

Single Author

Dynamically Reconfigurable Coprocessor for Exception Detection, 情処研報, 2004-SLDM-115 47-52, 2004.05

M. Tomono, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Quantum Pushdown Automata that can Deterministically Solve a Certain Problem, Proc. of International Symposium on Mesoscopic Superconductivity and Spintronics (MS+S2004), 310-315, 2004.03

Y. Murakami, M. Nakanishi, S. Yamashita, and K. Watanabe

Multiple Authorship (Including Foreigners)

Minimization of Fractional Wordlength on Fixed-Point Conversion for High-Level Synthesis, In. Proc. of Asia and South Pacific Design Automation Conference 2004 (ASP-DAC 2004), 80-85, 2004.01

N. Doi, T. Horiyama, M. Nakanishi, and S. Kimura

Multiple Authorship (Including Foreigners)

Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis, IEICE Trans. Fundamentals, E86-A(12) 3184-3191, 2003.12

N. Doi, T. Horiyama, M. Nakanishi, S. Kimura, and K. Watanabe

Multiple Authorship (Including Foreigners)

One-Sided Error Quantum Pushdown Automata with Classical Stack Operations, IEICE Technical Report, QIT2003-93 155-158, 2003.12

M. Nakanishi

Single Author

Automatic Generation of Java-Based, Database-Independent Query API, IEICE Technical Report, DE2003-115 25-30, 2003.10

T. Majima, M. Nakanishi, and K. Watanabe

Multiple Authorship (Including Foreigners)

Bit Length Optimization of Fractional Parts on Floating to Fixed Point Conversion for High-Level Synthesis, Proc. of 12th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2003), 129-136, 2003.04

N. Doi, T. Horiyama, M. Nakanishi, S. Kimura, and K. Watanabe

Multiple Authorship (Including Foreigners)

An On-Chip High Speed Serial Communication Method Based on Independent Ring Oscillators, Proc. of International Solid-State Circuits Conference (ISSCC2003), 390-391, 2003.02

S. Kimura, T. Hayakawa, T. Horiyama, M. Nakanishi, and K. Watanabe

Multiple Authorship (Including Foreigners)

Look Up Table Compaction Based on Folding of Logic Function, IEICE Trans. Fundamentals, E85-A(12) 2701-2707, 2002.12

S. Kimura, A. Ishii, T. Horiyama, M. Nakanishi, H. Kajihara, and K. Watanabe

Multiple Authorship (Including Foreigners)

Folding of Logic Functions and Its Application to Look Up Table Compaction, Proc. of International Conference on Computer Aided Design (ICCAD2002), 694-698, 2002.11

S. Kimura, T. Horiyama, M. Nakanishi, and H. Kajihara

Multiple Authorship (Including Foreigners)

Expressive Power of Quantum Pushdown Automata with a Classical Stack, IEICE Technical Report, QIT2002-41 195-198, 2002.05

M. Nakanishi, T. Indoh, K. Hamaguchi, and T. Kashiwabara

Multiple Authorship (Including Foreigners)

On the Power of Non-deterministic Quantum Finite Automata, IEICE Trans. Inf. & Syst., E85-D(2) 327-332, 2002.02

M. Nakanishi, T. Indoh, K. Hamaguchi, and T. Kashiwabara

Multiple Authorship (Including Foreigners)

A Real-Time User-Independent Eye Tracking LSI with Environment Adaptability, Proc. of 10th Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI 2001), 357-361, 2001.10

K. Nakamura, M. Nakanishi, T. Horiyama, M. Suzuki, S. Kimura, and K. Watanabe

Multiple Authorship (Including Foreigners)

Ordered Quantum Branching Programs Are More Powerful than Ordered Probabilistic Branching Programs under a Bounded-Width Restriction, Proc. of 6th Annual International Computing and Combinatorics Conference (COCOON 2000), 467-476, 2000.07

M. Nakanishi, K. Hamaguchi, and T. Kashiwabara

Multiple Authorship (Including Foreigners)

An Exponential Lower Bound on the Size of a Binary Moment Diagram Representing Integer Division, IEICE Trans. Fundamentals, E82-A(5) 756-766, 1999.05

M. Nakanishi, K. Hamaguchi, and T. Kashiwabara

Multiple Authorship (Including Foreigners)

Grant-in-Aid for Scientific Research(C)，2008.04 - 2011.03

Grant-in-Aid for Scientific Research(B)，2007.04 - 2010.03

Grant-in-Aid for Young Scientists(B)，2006.04 - 2009.03

Grant-in-Aid for Scientific Research on Priority Areas，2004.04 - 2008.03

Grant-in-Aid for Young Scientists(B)，2003.04 - 2006.03

Grant-in-Aid for Scientific Research(C)，2003.04 - 2006.03

Grant-in-Aid for Scientific Research(B)，2000.04 - 2002.03